Dr. Ranjani Parthasarathi

Professor

 

Phone    : 91-44-22203340 (O)

Email     : rp@annauniv.edu

M.S.     -     Illinois Inst. of Tech.     -      1988

Ph.D.   -     IIT Madras                    -      1996



Computer Architecture, Optical Computing, Microprocessor based design, Networks.

  1. T. Dhanabalan, Ranjani Parathasarathi and T.V. Geetha, Tamil Spell Checker, Tamil Internet 2003, August 22-24, Chennai, Tamil Nadu, 2003.

  2. A.P Shanthi and Ranjani Parthasarathi, Exploring FPGA structures for Evolving Fault Tolerant Hardware, In EHW/DoD workshop on Evolvable Hardware, EHW 2003, Chicago, July 2003.

  3. Mohan G. Kabadi, N. Kannan, P. Chidambaram, M.S.Suriya Narayana and Ranjani Parthasarathi,  Dead-Block Elimination in Cache: A Mechanism to Reduce I Cache Power Consumption in High Performance Microprocessors, Proc. Ninth International conference on High Performance Computing (HiPC 2002), PP 79-88, December 2002.

  4. E. Raman, L.N. Chakrapani, K. Sankaranarayanan and Ranjani Parthasarathi, A Scalable Reconfigurable Architecture for Divisibility testing of variable long precision number, FCCM 02, IEEE symposium on Field-Programmable Custom computing Mechanics, CA, April 2002.

  5. S. Palaniswami, B. Vijayan, M. Rajendran, Senthilkumar Veluswami and Ranjani Parthasarathi, Automatic Evolution of fault Tolerant Digital Circuits, 4th Asia-Pacific Conference on Simulated Evolution and Learning (SEAL02), vol.2 pp 842-849, Singapore, Nov 2002.

  6. A. P Shanthi, Balaji vijayan, Manivel Rajendran, Senthilkumar Veluswamy and Ranjani Parthasarathi, GA Based On-line Testing and Recovery for Critical Digital Systems, Workshop on Softcomputing, HiPC 2002, Pp 81-89.

  7. M.I.D. Babu, B.L. Narayanan, G.M.S. Sibi  and Ranjani Parthasarthi, Functional Unit Usage Based Thread Selection in a Simultaneous Multithreaded Processor, International Conference on HiPC, Poster Session, Hyderabad, Dec 2001.

  8. Srinath Gunasekaran, Sundaram Subramanian, Venkatesan Packirisamy, and Ranjani Parthasarthi, Hardware Assisted Profile Information Collection and Reuse, International Conference on HiPC, Poster Session, Hyderabad, Dec 2001.

  9. V.M. Karky, S. Sudarshanan, R. Thayagarajan , T.V.Geetha,
    Ranjani Parthasarathi, and Manoj Annadurai, Tamil Voice Engine, Presented at Tamil Inayam, Malaysia, 2001.

  10. Ranjani Parthasarathi, E. Raman, K. Sankaranarayanan and L.N. Chakrapani, A Reconfigurable Co-processor for variable long precision Arithmetic using Indian Algorithms, FCCM 01, IEEE symposium on Field-Programmable Custom computing Mechanics, CA, April 2001.